<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN"> <html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"> <title>Ubixos: lnc.h Source File</title> <link href="doxygen.css" rel="stylesheet" type="text/css"> </head><body> <!-- Generated by Doxygen 1.3.3 --> <h1>lnc.h</h1><div class="fragment"><pre>00001 <span class="preprocessor">#ifndef _LNC_H</span> 00002 <span class="preprocessor"></span><span class="preprocessor">#define _LNC_H</span> 00003 <span class="preprocessor"></span> 00004 <span class="preprocessor">#include <ubixos/types.h></span> 00005 00006 <span class="preprocessor">#define NDESC(len2) (1 << len2)</span> 00007 <span class="preprocessor"></span><span class="preprocessor">#define NORMAL 0</span> 00008 <span class="preprocessor"></span><span class="preprocessor">#define MEM_SLEW 8</span> 00009 <span class="preprocessor"></span><span class="preprocessor">#define TRANSBUFSIZE 1518</span> 00010 <span class="preprocessor"></span><span class="preprocessor">#define RECVBUFSIZE 1518</span> 00011 <span class="preprocessor"></span><span class="preprocessor">#define NRDRE 3</span> 00012 <span class="preprocessor"></span><span class="preprocessor">#define NTDRE 3</span> 00013 <span class="preprocessor"></span><span class="preprocessor">#define ETHER_ADDR_LEN 6</span> 00014 <span class="preprocessor"></span><span class="preprocessor">#define NE2100_IOSIZE 24</span> 00015 <span class="preprocessor"></span><span class="preprocessor">#define PCNET_RDP 0x10 </span><span class="comment">/* Register Data Port */</span> 00016 <span class="preprocessor">#define PCNET_RAP 0x12 </span><span class="comment">/* Register Address Port */</span> 00017 <span class="preprocessor">#define PCNET_RESET 0x14</span> 00018 <span class="preprocessor"></span><span class="preprocessor">#define PCNET_BDP 0x16</span> 00019 <span class="preprocessor"></span><span class="preprocessor">#define PCNET_VSW 0x18</span> 00020 <span class="preprocessor"></span><span class="preprocessor">#define NE2100 2</span> 00021 <span class="preprocessor"></span> 00022 <span class="comment">/* mem_mode values */</span> 00023 <span class="preprocessor">#define DMA_FIXED 1</span> 00024 <span class="preprocessor"></span><span class="preprocessor">#define DMA_MBUF 2</span> 00025 <span class="preprocessor"></span><span class="preprocessor">#define SHMEM 4</span> 00026 <span class="preprocessor"></span> 00027 00028 <span class="comment">/********** Chip Types **********/</span> 00029 <span class="preprocessor">#define UNKNOWN 0 </span><span class="comment">/* Unknown */</span> 00030 <span class="preprocessor">#define LANCE 1 </span><span class="comment">/* Am7990 */</span> 00031 <span class="preprocessor">#define C_LANCE 2 </span><span class="comment">/* Am79C90 */</span> 00032 <span class="preprocessor">#define PCnet_ISA 3 </span><span class="comment">/* Am79C960 */</span> 00033 <span class="preprocessor">#define PCnet_ISAplus 4 </span><span class="comment">/* Am79C961 */</span> 00034 <span class="preprocessor">#define PCnet_ISA_II 5 </span><span class="comment">/* Am79C961A */</span> 00035 <span class="preprocessor">#define PCnet_32 6 </span><span class="comment">/* Am79C965 */</span> 00036 <span class="preprocessor">#define PCnet_PCI 7 </span><span class="comment">/* Am79C970 */</span> 00037 <span class="preprocessor">#define PCnet_PCI_II 8 </span><span class="comment">/* Am79C970A */</span> 00038 <span class="preprocessor">#define PCnet_FAST 9 </span><span class="comment">/* Am79C971 */</span> 00039 <span class="preprocessor">#define PCnet_FASTplus 10 </span><span class="comment">/* Am79C972 */</span> 00040 <span class="preprocessor">#define PCnet_Home 11 </span><span class="comment">/* Am79C978 */</span> 00041 00042 <span class="comment">/******** AM7990 Specifics **************/</span> 00043 <span class="preprocessor">#define CSR0 0x0000</span> 00044 <span class="preprocessor"></span><span class="preprocessor">#define CSR1 1</span> 00045 <span class="preprocessor"></span><span class="preprocessor">#define CSR2 2</span> 00046 <span class="preprocessor"></span><span class="preprocessor">#define CSR3 3</span> 00047 <span class="preprocessor"></span><span class="preprocessor">#define CSR88 88</span> 00048 <span class="preprocessor"></span><span class="preprocessor">#define CSR89 89</span> 00049 <span class="preprocessor"></span> 00050 <span class="preprocessor">#define ERR 0x8000</span> 00051 <span class="preprocessor"></span><span class="preprocessor">#define BABL 0x4000</span> 00052 <span class="preprocessor"></span><span class="preprocessor">#define CERR 0x2000</span> 00053 <span class="preprocessor"></span><span class="preprocessor">#define MISS 0x1000</span> 00054 <span class="preprocessor"></span><span class="preprocessor">#define MERR 0x0800</span> 00055 <span class="preprocessor"></span><span class="preprocessor">#define RINT 0x0400</span> 00056 <span class="preprocessor"></span><span class="preprocessor">#define TINT 0x0200</span> 00057 <span class="preprocessor"></span><span class="preprocessor">#define IDON 0x0100</span> 00058 <span class="preprocessor"></span><span class="preprocessor">#define INTR 0x0080</span> 00059 <span class="preprocessor"></span><span class="preprocessor">#define INEA 0x0040</span> 00060 <span class="preprocessor"></span><span class="preprocessor">#define RXON 0x0020</span> 00061 <span class="preprocessor"></span><span class="preprocessor">#define TXON 0x0010</span> 00062 <span class="preprocessor"></span><span class="preprocessor">#define TDMD 0x0008</span> 00063 <span class="preprocessor"></span><span class="preprocessor">#define STOP 0x0004</span> 00064 <span class="preprocessor"></span><span class="preprocessor">#define STRT 0x0002</span> 00065 <span class="preprocessor"></span><span class="preprocessor">#define INIT 0x0001</span> 00066 <span class="preprocessor"></span> 00067 00068 <span class="comment">/* CSR88-89: Chip ID masks */</span> 00069 <span class="preprocessor">#define AMD_MASK 0x003</span> 00070 <span class="preprocessor"></span><span class="preprocessor">#define PART_MASK 0xffff</span> 00071 <span class="preprocessor"></span><span class="preprocessor">#define Am79C960 0x0003</span> 00072 <span class="preprocessor"></span><span class="preprocessor">#define Am79C961 0x2260</span> 00073 <span class="preprocessor"></span><span class="preprocessor">#define Am79C961A 0x2261</span> 00074 <span class="preprocessor"></span><span class="preprocessor">#define Am79C965 0x2430</span> 00075 <span class="preprocessor"></span><span class="preprocessor">#define Am79C970 0x0242</span> 00076 <span class="preprocessor"></span><span class="preprocessor">#define Am79C970A 0x2621</span> 00077 <span class="preprocessor"></span><span class="preprocessor">#define Am79C971 0x2623</span> 00078 <span class="preprocessor"></span><span class="preprocessor">#define Am79C972 0x2624</span> 00079 <span class="preprocessor"></span><span class="preprocessor">#define Am79C973 0x2625</span> 00080 <span class="preprocessor"></span><span class="preprocessor">#define Am79C978 0x2626</span> 00081 <span class="preprocessor"></span> 00082 <span class="comment">/********** Structs **********/</span> 00083 00084 00085 00086 00087 <span class="keyword">struct </span>initBlock { 00088 uInt16 mode; <span class="comment">/* Mode register */</span> 00089 uInt8 padr[6]; <span class="comment">/* Ethernet address */</span> 00090 uInt8 ladrf[8]; <span class="comment">/* Logical address filter (multicast) */</span> 00091 uInt16 rdra; <span class="comment">/* Low order pointer to receive ring */</span> 00092 uInt16 rlen; <span class="comment">/* High order pointer and no. rings */</span> 00093 uInt16 tdra; <span class="comment">/* Low order pointer to transmit ring */</span> 00094 uInt16 tlen; <span class="comment">/* High order pointer and no rings */</span> 00095 }; 00096 00097 <span class="keyword">struct </span>mds { 00098 uInt16 md0; 00099 uInt16 md1; 00100 <span class="keywordtype">short</span> md2; 00101 uInt16 md3; 00102 }; 00103 00104 <span class="keyword">struct </span>hostRingEntry { 00105 <span class="keyword">struct </span>mds *md; 00106 <span class="keyword">union </span>{ 00107 <span class="comment">//struct mbuf *mbuf;</span> 00108 <span class="keywordtype">char</span> *data; 00109 }buff; 00110 }; 00111 00112 <span class="keyword">struct </span>arpcom { 00113 <span class="comment">//struct ifnet ac_if; /* network-visible interface */</span> 00114 uInt8 ac_enaddr[6]; <span class="comment">/* ethernet hardware address */</span> 00115 <span class="keywordtype">int</span> ac_multicnt; <span class="comment">/* length of ac_multiaddrs list */</span> 00116 <span class="keywordtype">void</span> *ac_netgraph; <span class="comment">/* ng_ether(4) netgraph node info */</span> 00117 }; 00118 00119 <span class="keyword">struct </span>nicInfo { 00120 <span class="keywordtype">int</span> ident; <span class="comment">/* Type of card */</span> 00121 <span class="keywordtype">int</span> ic; <span class="comment">/* Type of ic, Am7990, Am79C960 etc. */</span> 00122 <span class="keywordtype">int</span> memMode; 00123 <span class="keywordtype">int</span> iobase; 00124 <span class="keywordtype">int</span> mode; <span class="comment">/* Mode setting at initialization */</span> 00125 }; 00126 00127 <span class="keyword">struct </span>lncInfo { 00128 <span class="keyword">struct </span>arpcom arpcom; 00129 <span class="keyword">struct </span>nicInfo nic; 00130 <span class="keyword">struct </span>hostRingEntry *recvRing; 00131 <span class="keyword">struct </span>hostRingEntry *transRings; 00132 <span class="keyword">struct </span>initBlock *initBloack; 00133 <span class="keywordtype">int</span> rap; 00134 <span class="keywordtype">int</span> rdp; 00135 <span class="keywordtype">int</span> bdp; 00136 <span class="keywordtype">int</span> nrdre; 00137 <span class="keywordtype">int</span> ntdre; 00138 }; 00139 00140 <span class="keyword">extern</span> <span class="keyword">struct </span>lncInfo *lnc; 00141 00142 <span class="keywordtype">void</span> writeCsr(<span class="keyword">struct</span> lncInfo *lnc, uInt16 port, uInt16 val); 00143 uInt16 readCsr(<span class="keyword">struct</span> lncInfo *lnc, uInt16 port); 00144 <span class="keywordtype">void</span> writeBcr(<span class="keyword">struct</span> lncInfo *lnc, uInt16 port, uInt16 val); 00145 uInt16 readBcr(<span class="keyword">struct</span> lncInfo *lnc, uInt16 port); 00146 00147 <span class="keywordtype">void</span> initLNC(); 00148 <span class="keywordtype">int</span> probe(<span class="keyword">struct</span> lncInfo *lnc); 00149 <span class="keywordtype">int</span> lanceProbe(<span class="keyword">struct</span> lncInfo *lnc); 00150 <span class="keywordtype">int</span> lncAttach(<span class="keyword">struct</span> lncInfo *lnc,<span class="keywordtype">int</span> unit); 00151 00152 00153 <span class="keywordtype">void</span> lncInt(); 00154 <span class="keywordtype">void</span> _lncInt(); 00155 00156 <span class="preprocessor">#endif</span> 00157 <span class="preprocessor"></span> </pre></div><hr size="1"><address style="align: right;"><small>Generated on Wed Apr 28 17:49:37 2004 for Ubixos by <a href="http://www.doxygen.org/index.html"> <img src="doxygen.png" alt="doxygen" align="middle" border=0 > </a>1.3.3 </small></address> </body> </html>