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<div class="title">cpu.h File Reference</div> </div>
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<div class="textblock"><code>#include <<a class="el" href="include_2sys_2types_8h_source.html">sys/types.h</a>></code><br />
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Include dependency graph for cpu.h:</div>
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<p><a href="i386_2cpu_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:a230859710d4e012ec1657f07822017bf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a230859710d4e012ec1657f07822017bf">PSL_AC</a>   0x00040000 /* alignment checking */</td></tr>
<tr class="separator:a230859710d4e012ec1657f07822017bf"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:af7efc436ccbdec4aa63587d987a61591"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#af7efc436ccbdec4aa63587d987a61591">PSL_AF</a>   0x00000010 /* bcd carry bit */</td></tr>
<tr class="separator:af7efc436ccbdec4aa63587d987a61591"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a9547f658d81341fdf691bb24c6243b74"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a9547f658d81341fdf691bb24c6243b74">PSL_C</a>   0x00000001 /* carry bit */</td></tr>
<tr class="separator:a9547f658d81341fdf691bb24c6243b74"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:af06ed08cb294e1cd08d0b6f35c9e1fbc"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#af06ed08cb294e1cd08d0b6f35c9e1fbc">PSL_D</a>   0x00000400 /* string instruction direction bit */</td></tr>
<tr class="separator:af06ed08cb294e1cd08d0b6f35c9e1fbc"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a98c39d27d67812ede94f5038a3cef419"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a98c39d27d67812ede94f5038a3cef419">PSL_I</a>   0x00000200 /* interrupt enable bit */</td></tr>
<tr class="separator:a98c39d27d67812ede94f5038a3cef419"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ac034f858038cac28ebfc824fe0869637"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#ac034f858038cac28ebfc824fe0869637">PSL_ID</a>   0x00200000 /* identification bit */</td></tr>
<tr class="separator:ac034f858038cac28ebfc824fe0869637"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a297c83711bf2691d769d822ccaa05624"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a297c83711bf2691d769d822ccaa05624">PSL_IOPL</a>   0x00003000 /* i/o privilege level */</td></tr>
<tr class="separator:a297c83711bf2691d769d822ccaa05624"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ac6dcfbe1a552cee92c58ceb4b9efe2a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#ac6dcfbe1a552cee92c58ceb4b9efe2a4">PSL_N</a>   0x00000080 /* negative bit */</td></tr>
<tr class="separator:ac6dcfbe1a552cee92c58ceb4b9efe2a4"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a710923be1caa918db03e85845e38dcc0"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a710923be1caa918db03e85845e38dcc0">PSL_NT</a>   0x00004000 /* nested task bit */</td></tr>
<tr class="separator:a710923be1caa918db03e85845e38dcc0"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:acfdea14b8a58b18ecd8ee9d0229e0ec4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#acfdea14b8a58b18ecd8ee9d0229e0ec4">PSL_PF</a>   0x00000004 /* parity bit */</td></tr>
<tr class="separator:acfdea14b8a58b18ecd8ee9d0229e0ec4"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aa0a60c8563cc5c168f8fdbbfa6a4dd2d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#aa0a60c8563cc5c168f8fdbbfa6a4dd2d">PSL_RF</a>   0x00010000 /* resume flag bit */</td></tr>
<tr class="separator:aa0a60c8563cc5c168f8fdbbfa6a4dd2d"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a046b08a139401fef36302220ed966954"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a046b08a139401fef36302220ed966954">PSL_T</a>   0x00000100 /* trace enable bit */</td></tr>
<tr class="separator:a046b08a139401fef36302220ed966954"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a257fcb967da8f721335eacfaf7720e1c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a257fcb967da8f721335eacfaf7720e1c">PSL_V</a>   0x00000800 /* overflow bit */</td></tr>
<tr class="separator:a257fcb967da8f721335eacfaf7720e1c"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a26ec29e6d59dd9365317845845692d65"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a26ec29e6d59dd9365317845845692d65">PSL_VIF</a>   0x00080000 /* virtual interrupt enable */</td></tr>
<tr class="separator:a26ec29e6d59dd9365317845845692d65"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a956d462c1a57880e450aca10ac8211b3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a956d462c1a57880e450aca10ac8211b3">PSL_VIP</a>   0x00100000 /* virtual interrupt pending */</td></tr>
<tr class="separator:a956d462c1a57880e450aca10ac8211b3"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:aa3631c6b312a0753c8d31a74858d812f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#aa3631c6b312a0753c8d31a74858d812f">PSL_VM</a>   0x00020000 /* virtual 8086 mode bit */</td></tr>
<tr class="separator:aa3631c6b312a0753c8d31a74858d812f"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:a918c080efa2bd0394e6ce27b3301310d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="i386_2cpu_8h.html#a918c080efa2bd0394e6ce27b3301310d">PSL_Z</a>   0x00000040 /* zero bit */</td></tr>
<tr class="separator:a918c080efa2bd0394e6ce27b3301310d"><td class="memSeparator" colspan="2"> </td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a id="a230859710d4e012ec1657f07822017bf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a230859710d4e012ec1657f07822017bf">◆ </a></span>PSL_AC</h2>
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<td class="memname">#define PSL_AC   0x00040000 /* alignment checking */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00050">50</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#af7efc436ccbdec4aa63587d987a61591">◆ </a></span>PSL_AF</h2>
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<td class="memname">#define PSL_AF   0x00000010 /* bcd carry bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00039">39</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a9547f658d81341fdf691bb24c6243b74">◆ </a></span>PSL_C</h2>
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<td class="memname">#define PSL_C   0x00000001 /* carry bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00037">37</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#af06ed08cb294e1cd08d0b6f35c9e1fbc">◆ </a></span>PSL_D</h2>
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<td class="memname">#define PSL_D   0x00000400 /* string instruction direction bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00044">44</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a98c39d27d67812ede94f5038a3cef419">◆ </a></span>PSL_I</h2>
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<td class="memname">#define PSL_I   0x00000200 /* interrupt enable bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00043">43</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ac034f858038cac28ebfc824fe0869637">◆ </a></span>PSL_ID</h2>
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<td class="memname">#define PSL_ID   0x00200000 /* identification bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00053">53</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a297c83711bf2691d769d822ccaa05624">◆ </a></span>PSL_IOPL</h2>
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<td class="memname">#define PSL_IOPL   0x00003000 /* i/o privilege level */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00046">46</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#ac6dcfbe1a552cee92c58ceb4b9efe2a4">◆ </a></span>PSL_N</h2>
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<td class="memname">#define PSL_N   0x00000080 /* negative bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00041">41</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a710923be1caa918db03e85845e38dcc0">◆ </a></span>PSL_NT</h2>
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<td class="memname">#define PSL_NT   0x00004000 /* nested task bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00047">47</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#acfdea14b8a58b18ecd8ee9d0229e0ec4">◆ </a></span>PSL_PF</h2>
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<td class="memname">#define PSL_PF   0x00000004 /* parity bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00038">38</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aa0a60c8563cc5c168f8fdbbfa6a4dd2d">◆ </a></span>PSL_RF</h2>
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<td class="memname">#define PSL_RF   0x00010000 /* resume flag bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00048">48</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a046b08a139401fef36302220ed966954">◆ </a></span>PSL_T</h2>
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<td class="memname">#define PSL_T   0x00000100 /* trace enable bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00042">42</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a257fcb967da8f721335eacfaf7720e1c">◆ </a></span>PSL_V</h2>
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<td class="memname">#define PSL_V   0x00000800 /* overflow bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00045">45</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a26ec29e6d59dd9365317845845692d65">◆ </a></span>PSL_VIF</h2>
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<td class="memname">#define PSL_VIF   0x00080000 /* virtual interrupt enable */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00051">51</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a956d462c1a57880e450aca10ac8211b3">◆ </a></span>PSL_VIP</h2>
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<td class="memname">#define PSL_VIP   0x00100000 /* virtual interrupt pending */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00052">52</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#aa3631c6b312a0753c8d31a74858d812f">◆ </a></span>PSL_VM</h2>
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<td class="memname">#define PSL_VM   0x00020000 /* virtual 8086 mode bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00049">49</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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<h2 class="memtitle"><span class="permalink"><a href="#a918c080efa2bd0394e6ce27b3301310d">◆ </a></span>PSL_Z</h2>
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<td class="memname">#define PSL_Z   0x00000040 /* zero bit */</td>
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<p class="definition">Definition at line <a class="el" href="i386_2cpu_8h_source.html#l00040">40</a> of file <a class="el" href="i386_2cpu_8h_source.html">cpu.h</a>.</p>
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